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I/O divided column redundancy scheme for high-speed DRAM with multiple I/Os

I/O divided column redundancy scheme for high-speed DRAM with multiple I/Os

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A novel I/O divided column redundancy (IDCR) scheme that can improve the effectiveness of repair and minimise the overhead of the die area is presented. The IDCR scheme has greater flexibility than conventional schemes in multiple I/O DRAMs. Since an IDCR can share neighbouring redundant column lines (RCLs), the RCLs of neighbouring I/O blocks can be used to repair the defective column lines of a self-block. This work also shows that the IDCR scheme improves the data access speed of normal column lines or redundant column lines by reducing the data bus loading.

References

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      • S. Takase , N. Kushiyama . A 1.6-Gbyte/s DRAM with flexible mapping redundancy technique and additionalrefresh scheme. IEEE J. Solid-State Circuits , 1600 - 1606
    2. 2)
      • T. Namekawa , S. Miyano , R. Fukuda , R. Haga , O. Wada , H. Banba , S. Takeda , K. Suda , K. Mimoto , S. Yamaguchi , T. Ohkubo , K. Numata . Dynamically shift-switched dataline redundancy suitable for DRAM macrowith wide data bus. IEEE J. Solid-State Circuits , 705 - 712
    3. 3)
      • Y.W. Jeon , Y.H. Jun , S.K. Kim . Column redundancy scheme for multiple I/O DRAM using mapping table. Electron. Lett. , 11 , 940 - 942
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