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On-chip timing reference for self-timed microprocessor

On-chip timing reference for self-timed microprocessor

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A calibratable on-chip timing reference circuit has been developed to enable a self-timed microprocessor to interface to standard off-chip memory and peripheral devices. The circuit exhibits several of the desirable properties of self-timed circuitry such as low power consumption and low electromagnetic interference (EMI). In addition, it is highly testable.

Inspec keywords: low-power electronics; delay circuits; microprocessor chips; calibration; timing circuits; asynchronous circuits; reference circuits

Other keywords: AMULET processors; low power consumption; low electromagnetic interference; on-chip timing reference; highly testable circuit; interfacing; peripheral devices; self-timed microprocessor; standard offchip memory; low EMI; self-timed circuitry

Subjects: Other digital circuits; Microprocessors and microcomputers; Microprocessor chips; Other circuits for digital computers

References

    1. 1)
      • Garside, J.D., Furber, S.B., Chung, S.-H.: `AMULET3 revealed', Proc. Async '99, April 1999, p. 51–59.
    2. 2)
      • I.E. Sutherland . Micropipelines. Commun. ACM , 6 , 720 - 738
    3. 3)
      • Furber, S.B., Day, P., Garside, J.D., Paver, N.C., Woods, J.V.: `The design and evaluation of an asynchronous microprocessor', Proc. ICCD'94, October 1994, p. 217–220.
    4. 4)
      • S.B. Furber , J.D. Garside , P. Riocreux , S. Temple , P. Day , J. Liu , N.C. Paver . AMULET2e: An asynchronous embedded controller. Proc. IEEE , 2 , 243 - 256
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