Non-volatile memory device with true CMOS compatibility

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Non-volatile memory device with true CMOS compatibility

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A low-cost non-volatile memory device using a standard CMOS process without additional processing steps is investigated for embedded applications. The cell consists of a PMOS transistor in which no electrical contact is made to the gate electrode and a series NMOS access transistor. Experimental data show that sufficient read current and disturb lifetime can be achieved. Data retention characteristics are also examined.

Inspec keywords: EPROM; CMOS memory circuits

Other keywords: data retention characteristics; embedded applications; nonvolatile memory device; series NMOS access transistor; low-cost memory device; standard CMOS process; PMOS transistor; CMOS compatibility; disturb lifetime; read current

Subjects: CMOS integrated circuits; Semiconductor storage; Memory circuits

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      • Kazerounian, R., Eilan, B.: `A single poly EPROM for custom CMOS logic applications', Proc. IEEE CICC, 1986, p. 59–62.
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