Simple frequency detector circuit for biphase and NRZ clock recovery

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Simple frequency detector circuit for biphase and NRZ clock recovery

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Published

A frequency detector circuit was developed to be used in a phase-locked loop to recover the clock from a biphase-encoded signal. The application of the circuit as a frequency acquisition aid for biphase and non-return-to-zero signal clock recovery is discussed.

Inspec keywords: CMOS digital integrated circuits; phase locked loops; detector circuits; timing circuits

Other keywords: PLL; phase-locked loop; biphase clock recovery; 0.8 micron; biphase-encoded signal; NRZ clock recovery; frequency detector circuit; 80 MHz; non-return-to-zero signal

Subjects: CMOS integrated circuits; Modulators, demodulators, discriminators and mixers; Other circuits for digital computers; Other digital circuits

References

    1. 1)
      • D.L. Chen . A power and area efficient clock/data recovery circuit for high speedserial interfaces. IEEE J. Solid State Circuits , 8 , 1170 - 1176
    2. 2)
      • D.G. Messerschmitt . Frequency detectors for PLL acquisition in timing and carrier recovery. IEEE Trans. , 1288 - 1295
    3. 3)
      • M. Johnson , E.L. Hudson . A variable delay line for CPU co-processor synchronisation. IEEE J. Solid State Circuits , 1218 - 1223
    4. 4)
      • L. DeVito , B. Razavi . (1996) A versatile clock recovery architecture and monolithic implementation, Monolithic phase-locked loops and clock recovery circuits.
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