Fabrication of SOI substrates with ultra-thin Si layers

Author(s): K.D. Hobart ; F.J. Kub ; G.G. Jernigan ; M.E. Twigg ; P.E. Thompson
DOI: 10.1049/el:19980829

For access to this article, please select a purchase option:

Buy article PDF

Buy Knowledge Pack

IET members benefit from discounts to all IET publications and free access to E&T Magazine. If you are an IET member, log in to your account and the discounts will automatically be applied.

Learn more about IET membership

Recommend Title Publication to library

Electronics Letters — Recommend this title to your library

Thank you

Your recommendation has been sent to your librarian.

Author(s): K.D. Hobart ¹ ; F.J. Kub ¹ ; G.G. Jernigan ¹ ; M.E. Twigg ¹ ; P.E. Thompson ¹
- Affiliations: 1: Naval Research Laboratory, Washington, USA
Source: Volume 34, Issue 12, 11 June 1998, p. 1265 – 1267
DOI: 10.1049/el:19980829 , Print ISSN 0013-5194, Online ISSN 1350-911X

A simple technique for the fabrication of ultra-thin silicon-on-insulator (SOI) substrates is presented. The bond-and-etch-back technique utilising an Si_xGe_1–x etch stop has been combined with the thin film separation by hydrogen implantation approach, and SOI substrates with ultra-thin (< 5 nm) Si layers have been successfully fabricated.

References

1. 1)
  - Yoshimi, Y., Wada, T., Kato, K., Tango, H.: `High-performance SOI MOSFET using thin SOI film', IEDM Tech. Dig., 1987, Washington, DC, p. 640–643.
2. 2)
  - M.P. Seah , W.A. Dench . Analytic expression for the electron inelastic mean freepath as a function of the electron kinetic energy. Surf. Interface Anal. , 2 - 11
3. 3)
  - T.K. Carns , M.O. Tanner , K.L. Wang . Chemical etching of Si1–xGexinHF:H2O2:CH3COOH. J. Electrochem. Soc. , 1260 - 1266
4. 4)
  - Godbey, D.J., Palkuti, L.J., Leonov, P., Krist, A., Wang, J., Twigg, M.E., Hughes, H.L., Hobart, K.: `Fabrication of bond and etch back silicon on insulator using SiGe-MBEandselective etching techniques', Mat. Res. Soc. Symp. Proc., 1991, 220, p. 291–295.
5. 5)
  - L.B. Freund , W.D. Nix . A critical thickness condition for a strained compliantsubstrate/epitaxial film system. Appl. Phys. Lett. , 173 - 175
6. 6)
  - A.R. Powell , S.S. Iyer , F.K. LeGoues . New approach to the growth of low dislocationrelaxed SiGe material. Appl. Phys. Lett. , 1856 - 1858
7. 7)
  - F. Balestra , S. Cristoveanu , M. Benachir , J. Brini , T. Elewa . Double-gate silicon-on-insulatorwith volume inversion: a new device with greatly enhanced performance. IEEE Electron. Device Lett. , 410 - 412
8. 8)
  - D.J. Godbey , M.E. Twigg , H.L. Hughes , L.J. Palkuti , P. Leonov , J.J. Wang . Fabrication of bond and etch-back silicon on insulator using a strainedSi0.7Ge0.3 layer asan etch stop. J. Electrochem. Soc. , 3219 - 3223
9. 9)
  - Y. Takahashi , H. Namatsu , K. Kurihara , K. Iwadate , M. Nagase , K. Murase . Size dependence of the characterisitics of Si single-electron transistorson SIMOX substrates. IEEE Trans. Electron. Device , 1213 - 1217
10. 10)
  - F.E. Ejeckam , M.L. Seaford , Y.-H. Lo , H.Q. Hou , B.E. Hammons . Dislocation-free InSb grown on GaAs compliant universal substrates. Appl. Phys. Lett. , 776 - 778
11. 11)
  - E. Yablonovitch , T. Gmitter , J.P. Harbison , R. Bhat . Extreme selectivity in the lift-off of epitaxial GaAs films. Appl. Phys. Lett. , 2222 - 2224
12. 12)
  - M. Bruel . Silicon-on-insulator material technology. Electron. Lett. , 1201 - 1202
13. 13)
  - Y. Omura , K. Kurihara , Y. Takahashi , T. Ishiyama , Y. Nakajima , K. Izumi . 50-nm channel NMOSFET/SIMOX with an ultrathin 2- or 6-nm thick siliconlayer and theirsignificant features of operations. IEEE Electron. Device Lett. , 190 - 193

Fabrication of SOI substrates with ultra-thin Si layers

Fabrication of SOI substrates with ultra-thin Si layers

Buy article PDF

Buy Knowledge Pack

Thank you

References

Related content