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Transactional active memory

Transactional active memory

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  • Author(s): Hong Va Leong 1  and  ManhoiChoy 2
    • View affiliations
    • Affiliations: 1: Department of Computing , Hong Kong Polytechnic University, Hung Hom, Hong Kong
      2: Department of Computer Science, Hong Kong University of Science and Technology, Clear Water Bay, Hong Kong
  • Source: Volume 33, Issue 17, 14 August 1997, p. 1441 – 1443
    DOI:  10.1049/el:19971003 , Print ISSN 0013-5194, Online ISSN 1350-911X
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Advances in VLSI technology have rendered the implementation of complex operation sequences or transactions inside the body of hardware memory chips a concrete possibility. We show that such an implementation will provide an attractive performance gain and demonstrate the effectiveness through simulation.

Inspec keywords: integrated memory circuits; VLSI

Other keywords: transactional active memory; VLSI technology; performance gain; complex operation sequences; hardware memory chips

Subjects: Memory circuits; Semiconductor integrated circuits; Semiconductor storage

References

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      • Asthana, A., Cravatts, M., Krzyzanowski, P.: `An experimental active-memory-basednetwork element', Proc. Third Int. Symp. High-PerformanceDistributed Comput., 1994, IEEE, p. 139–148.
    2. 2)
      • P.A. Bernstein , V. Hadzilacos , N. Goodman . (1987) Concurrency control and recovery indatabase systems.
    3. 3)
      • Herlihy, M.P., Moss, J.E.B.: `Transactional memory: Architectural supportfor lock-free data structure', Proc. 20th Ann. Int. Symp. Computer Architecture, 1993, IEEE, p. 289–300.
    4. 4)
      • Microelectronics and ComputerTechnol. Corporation, Schwetman, H.: `CSIM reference manual (Revision 17)', .
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