The effects of substrate engineering for δ-doped SiGe p-MOSFETs are analysed using a 3D device simulator, DAVINCI. The device uses the placement of an intrinsic buffer layer as well as an n+ control layer underneath the δ-doped layer in order to adjust the device characteristics. Results of the simulation showed that the devices have higher current driving capability compared to the conventional silicon p-MOSFETs. The electrical characteristics of the device were effectively controlled by varying the doping level and the thickness of either the buffer layer or the control layer.
References
-
-
1)
-
K. Ismail
.
Si/SiGe high speed field effect transistor.
WDM Tech. Dig., IEEE
,
509 -
512
-
2)
-
S.P. Voinigescu ,
C.A.T. Salama ,
J.P. Noel ,
T.I. Kamins
.
Optimized Ge channel profile for VLSI compatible Si/SiGe p-MOSFETs.
IEDM Tech. Dig., IEEE
,
369 -
372
-
3)
-
J.B. Jacobs ,
D. Antoniadis
.
Channel profile engineering for MOSFETs with 100 nm channel length.
IEEE Electron Devices
,
5 ,
870 -
875
-
4)
-
Y. Taur ,
S. Wind ,
Y.J. Mii ,
D. Moy ,
K.A. Jenkins ,
C.L. Chen ,
P.J. Coane ,
D. Klaus ,
J. Bucchignano ,
M. Rosenfield ,
M.G.R. Thompson ,
M. Polcari
.
High performance of 100 nm CMOS devices.
WDM Tech. Dig., IEEE
,
127 -
130
http://iet.metastore.ingenta.com/content/journals/10.1049/el_19961572
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