RT Journal Article
A1 R.G.E. Pinch

PB iet
T1 Asymptotic upper bound for multiplier design
JN Electronics Letters
VO 32
IS 5
SP 420
OP 421
AB The cost, in terms of adders/subtractors, of multiplication by n-bit integers when shifts are free is shown to be of the order of n/(log n)α for any α < 1.
K1 asymptotic upper bound
K1 n-bit integers
K1 adders
K1 multiplier design
K1 subtractors
DO https://doi.org/10.1049/el:19960348
UL https://digital-library.theiet.org/;jsessionid=9cnayb07h2v3.x-iet-live-01content/journals/10.1049/el_19960348
LA English
SN 0013-5194
YR 1996
OL EN