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Design and analysis of a low power HEMT SRAM cell

Design and analysis of a low power HEMT SRAM cell

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Design and evaluation of a novel high speed low power static RAM cell in AlGaAs/GaAs quantum well technology is presented. A current sense amplifier to accompany this cell is also proposed. Simulation results show an access time of 700 ps with standby and active currents of 14 µA/bit and 0.29 mA/bit, respectively. The cell area is found to be comparable to that of the corresponding full DCFL cell.

References

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      • Berroth, M.: `IAF design manual, active devices', March 1994, p. 4.1–4.27, Version 3.0.
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      • Bratov, V.A., Kraochenko, L.N., Staroselsky, V.I., Suetinov, V.I.: `Various memory elements', USSR, 1164787, IC5 G11 C11/40, 1980, p. 4.
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      • Staroselsky, V.I., Suetinov, V.I., Bratov, V.A., Timoshenkov, V.P., Rodionov, M.J.: `Sense amplifier utilising FETs', USSR, 1464210, ICI G11 E 7/00, 1989, p. 3.
http://iet.metastore.ingenta.com/content/journals/10.1049/el_19951278
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