Your browser does not support JavaScript!
http://iet.metastore.ingenta.com
1887

Unified array architecture for discrete cosine transform, sine transform and their inverses

Unified array architecture for discrete cosine transform, sine transform and their inverses

For access to this article, please select a purchase option:

Buy article PDF
£12.50
(plus tax if applicable)
Add to cart
Buy Knowledge Pack
10 articles for £75.00
(plus taxes if applicable)
Add to cart

IET members benefit from discounts to all IET publications and free access to E&T Magazine. If you are an IET member, log in to your account and the discounts will automatically be applied.

Learn more about IET membership 

Recommend Title Publication to library

You must fill out fields marked with: *

Librarian details
Name:*
Email:*
Your details
Name:*
Email:*
Department:*
Why are you recommending this title?
Select reason:
 
 
 
 
 
Electronics Letters — Recommend this title to your library

Thank you

Your recommendation has been sent to your librarian.

© IEE
Published

A unified array design for the discrete cosine transform, discrete sine transform and their inverses based on a new general formulation is presented. The presented design provides the flexibility to adaptively select different types of transforms in transform coding according to the characteristics of images for minimising the bit rate as much as possible.

Inspec keywords: transform coding; image coding; digital signal processing chips; discrete cosine transforms; parallel algorithms; systolic arrays; transforms

Other keywords: inverse DST; discrete cosine transform; unified array architecture; discrete sine transform; inverse DCT; transform coding; image processing

Subjects: Microprocessors and microcomputers; Parallel architecture; Parallel programming and algorithm theory; Other numerical methods; Computer vision and image processing techniques; Digital signal processing chips; Other numerical methods; Integral transforms; Integral transforms; Optical information, image and video signal processing

References

    1. 1)
      • Guo, J.I., Liu, C.M., Jen, C.W.: `A memory-based approach to design and implement systolic arrays for DFTand DCT', Proc. IEEE Int. Conf. on Acoustics, Speech, and Signal Processing, 1992, p. v.621–v.624.
    2. 2)
      • L.W. Chang , M.C. Wu . A unified systolic array for discrete cosine and sine transforms. IEEE Trans. , 192 - 194
    3. 3)
      • S.A. White . Applications of distributed arithmetic to digital signal processing:A tutorial view. IEEE ASSP Mag. , 4 - 19
    4. 4)
      • J.I. Guo , C.M. Liu , C.W. Jen . The efficient memory-based VLSI array designs for DFT and DCT. IEEE Trans. , 723 - 733
    5. 5)
      • M.T. Sun , L. Wu , M.L. Liou . A concurrent architecture for VLSI implementation of discrete cosinetransform. IEEE Trans. , 992 - 994
    6. 6)
      • K.R. Rao , P. Yip . (1990) Discrete cosine transform: algorithms, advantages, applications.
    7. 7)
      • A.K. Jain . (1989) Fundamentals of digital image processing.
    8. 8)
      • N. Ahmed , T. Natarajan , K.R. Rao . Discrete cosine transform. IEEE Trans. , 90 - 93
    9. 9)
      • Guo, J.I., Liu, C.M., Jen, C.W.: `New systolic arrays for prime length discrete cosine transform', Proc. IEEE Workshop on Visual Signal Processing and Communications, 1991, p. 67–70.
http://iet.metastore.ingenta.com/content/journals/10.1049/el_19951254
Loading

Related content

content/journals/10.1049/el_19951254
pub_keyword,iet_inspecKeyword,pub_concept
6
6
Loading
Print this page
This is a required field
Please enter a valid email address