CMOS data output buffer for integrated memories

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CMOS data output buffer for integrated memories

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© The Institution of Electrical Engineers
Published

A data output buffer for CMOS integrated memories is presented. Output presetting techniques together with a suitable driving of the final transistors are used. The switching noise on supply lines is minimised while high operation speed is preserved. A buffer for a 0.8 μm EPROM process has been designed using the proposed approach.

Inspec keywords: integrated memory circuits; CMOS integrated circuits; EPROM; buffer circuits

Other keywords: switching noise; data output buffer; 0.8 micron; EPROM process; high operation speed; CMOS integrated memories

Subjects: Memory circuits; CMOS integrated circuits; Semiconductor storage

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