© The Institution of Electrical Engineers
A dynamic current-mode multiple valued memory is proposed, which is based on current copier and single slope A/D techniques. An error correction technique can also be used to increase noise margins of the stored values by storing and comparing the LSBs of the binary representation during each refresh cycle.
References
-
-
1)
-
M. Horiguchi ,
M. Aoki ,
Y. Nakagome ,
S. Ikenaga ,
K. Shimohigashi
.
An experimental large-capacity semiconductor file memory using 16-levels/cell storage.
IEEE J. Solid State Circuits
,
1 ,
27 -
33
-
2)
-
E.K.F. Lee ,
P.G. Gulak
.
Error correction technique for multivalued MOS memory.
Electron. Lett.
,
15 ,
1321 -
1323
-
3)
-
Current, K.W., Hurlston, M.E.: `A bi-directional currentmode CMOS multiple valued logic memory circuit', Proc. Int. Symp. on Multiple Valued Logic, May 1991, p. 196–202.
-
4)
-
D.B. Schwartz ,
R.E. Howard ,
W.E. Hubbard
.
A programmable analog neural network chip.
IEEE J. Solid State Circuits
,
2 ,
313 -
319
-
5)
-
E.K.F. Lee ,
P.G. Gulak
.
A CMOS field programmable analog array.
IEEE J. Solid State Circuits
,
12 ,
1860 -
1867
-
6)
-
E.A. Vittoz ,
G. Wegmann
.
(1990)
Dynamic current mirrors, Analogue IC design: the current-mode approach.
http://iet.metastore.ingenta.com/content/journals/10.1049/el_19920676
Related content
content/journals/10.1049/el_19920676
pub_keyword,iet_inspecKeyword,pub_concept
6
6