High-speed hybrid current-mode sense amplifier for CMOS SRAMs

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High-speed hybrid current-mode sense amplifier for CMOS SRAMs

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© The Institution of Electrical Engineers
Published

A new hybrid current-mode sense amplifier for fast CMOS SRAMs is presented. The sensing speed is twice that of the conventional current-sensing data path and independent of the bit-line and data-line capacitances. In addition, low voltage swings at bit lines and data lines reduce the power dissipation and voltage noise coupling significantly.

Inspec keywords: amplifiers; CMOS integrated circuits; SRAM chips

Other keywords: capacitances; voltage noise coupling; current-sensing data path; bit lines; CMOS SRAMs; sense amplifier; data lines; power dissipation; hybrid current-mode

Subjects: Memory circuits; Semiconductor storage; CMOS integrated circuits

References

    1. 1)
      • Seevinck, E.: `A current sense-amplifier for fast CMOS SRAMs', VLSI Circuits Symp. Dig. Tech. Papers, 1990, p. 71–72.
    2. 2)
      • T.N. Blalock , R.C. Jaeger . A high speed clamped bit-line current-mode sense amplifier. IEEE J. Solid-State Circuits , 4 , 542 - 548
    3. 3)
      • E. Seevinck , P. Beers , H. Ontrop . Current-mode techniques for high-speed VLSI circuits with application to current sense amplifier for CMOSSRAM's. IEEE J. Solid-State Circuits , 4 , 525 - 536
    4. 4)
      • Orbit Semiconductor, `Foresight Users Manual', 1990.
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