Dynamic latch for high speed GaAs domino circuits

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Dynamic latch for high speed GaAs domino circuits

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© The Institution of Electrical Engineers
Published

A latch for use with GaAs domino logic gates is presented. A hybrid of a GaAs domino logic gate and a two-phase dynamic FET logic gate, the latch stores data during the precharge phase of domino logic operation. It enables the use of domino logic in large scale systems without the need for interfacing with power consumptive static latches. It is implemented with depletion mode MESFETs and dissipates 0.8 mW.

Inspec keywords: gallium arsenide; integrated logic circuits; flip-flops; logic gates; Schottky gate field effect transistors; III-V semiconductors

Other keywords: two-phase dynamic FET logic gate; 0.8 mW; depletion mode MESFETs; logic gates; latch; domino circuits; large scale systems; precharge phase

Subjects: Logic circuits; Other field effect integrated circuits; Logic and switching circuits

References

    1. 1)
      • L. Yang , R. Chakharapani , S.I. Long . A high speed domino circuit implemented with GaAs MESFE's. IEEE J. Solid-State Circuits , 874 - 879
    2. 2)
      • Nary, K.R., Long, S.I.: `Two-phase dynamic FET logic: an extremely low power, high speed logic family for GaAs VLSI', IEEE GaAs IC Symp. Tech. Dig., 1991.
    3. 3)
      • D.H.K. Hoe , C.A.T. Salama . Dynamic GaAs capacitively coupled domino logic (CCDL). IEEE J. Solid-State Circuits , 844 - 849
    4. 4)
      • Information Sciences Institute, 4676 Admiralty Way, Marina del Rey, CA 90292.
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