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Input and output queueing ATM switch architecture with spatial and temporal slot reservation control

Input and output queueing ATM switch architecture with spatial and temporal slot reservation control

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© The Institution of Electrical Engineers
Published

A viable ATM switch architecture exploiting both input and output queucing on a space division switch is proposed. This architecture features both input and output ports that are divided into several groups, and an efficient contention resolution algorithm is developed. The performance study indicates that a group size of 8 is sufficient to achieve 90% efficiency.

Inspec keywords: digital communication systems; ISDN; protocols; queueing theory; time division multiplexing; switching systems

Other keywords: contention resolution algorithm; temporal slot reservation control; ATM switch architecture; output queueing; input queueing; broadband ISDN; BSB switch; FIFO queues; 90 percent; space division switch

Subjects: Queueing systems; ISDN; Integrated switching and transmission systems; Protocols

References

    1. 1)
      • H. Obara . Optimum architecture for input queueing ATM switches. Electron. Lett. , 7 , 555 - 556
    2. 2)
      • Obara, H., Yasushi, T.: `High speed transport processor for broadband burst transport system', Proc. IEEE Int. Conf on Communications, 1988, Philadelphia, p. 922–927.
    3. 3)
      • Tokizawa, I., Sato, K.: `Broadband transport techniques based on virtual path', Proc. IEEE Global Telecommunications Conf., 1990, San Diego, p. 1269–1273.
    4. 4)
      • Obara, H., Sasagawa, M., Tokizawa, I.: `An ATM crossconnect system for broadband transport networks based on virtual path concept', Proc. IEEE Int. Conf on Communications, 1990, Atlanta, p. 839–843.
    5. 5)
      • Eng, K.Y., Karol, M.J., Chih-lin, I.: `A modulator broadband (ATM) switch architecture with optimum performance', Proc 13th Int. Switching Symp., 1990, Stockholm, 4, p. 1–6.
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