Four-quadrant multiplier combining sigma-delta and multirate processing techniques

Four-quadrant multiplier combining sigma-delta and multirate processing techniques

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A mixed analogue-digital solution combining sigma-delta and multirate processing techniques is proposed for realising four-quadrant multipliers. This overcomes the major limitations of purely analogue circuits and still achieves the attractive benefits of low power consumption and small chip size which cannot be afforded using digital signal processing techniques together with auxiliary analogue-digital and digital-analogue convertors.


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