Inexact match associative memory cell
Inexact match associative memory cell
- Author(s): W.R. Daasch
- DOI: 10.1049/el:19911015
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- Author(s): W.R. Daasch 1
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View affiliations
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Affiliations:
1: Department of Electrical Engineering, Portland State University, Portland, USA
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Affiliations:
1: Department of Electrical Engineering, Portland State University, Portland, USA
- Source:
Volume 27, Issue 18,
29 August 1991,
p.
1623 – 1625
DOI: 10.1049/el:19911015 , Print ISSN 0013-5194, Online ISSN 1350-911X
A new associative memory cell is described and analysed using SPICE3d1. The CMOS cell uses current summation to compute, in parallel, Hamming distances between the search key and each word in the memory. For 32 bit words, SPICE simulations of a 2μm process show a delay of 4ns/bit for Hamming distances less than three.
Inspec keywords: circuit analysis computing; CMOS integrated circuits; content-addressable storage; integrated memory circuits; parallel processing
Other keywords:
Subjects: Electronic engineering computing; Memory circuits; Semiconductor storage; Multiprocessing systems; CMOS integrated circuits; Computer-aided circuit analysis and design
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