© The Institution of Electrical Engineers
Implementation of a winner-take-all (WTA) network suitable for implementing a nearest-match content-addressable memory (CAM) is presented. The resolution of the network in differentiating between words with large bit mismatches is presented. A measure of the time performance of the network is also given. A fully functional 16 word by 12 bit chip has been fabricated through MOSIS using 2 μm double-metal CMOS technology.
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Jalaleddine, S.M.S.: `Integrated circuit implementation of associative memories with neural inspired best match and relational search capabilities', December 1990, Ph.D. Dissertation, Oklahoma State University.
http://iet.metastore.ingenta.com/content/journals/10.1049/el_19910597
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