Six-bit DPCM video signal processing and implementation using systolic arrays

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Six-bit DPCM video signal processing and implementation using systolic arrays

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© The Institution of Electrical Engineers
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A novel approach to increase the speed and reduce the hardware requirement of 2-D systolic convolvers for real-time video signal/image processing is proposed. This is achieved by coding video signals/images more efficiently using six-bit I-D DPCM coding. It is shown that using six-bit differential pulse-code modulation processing results in a 57% improvement in speed and a significant saving in the cost of 2-D systolic convolvers. The effect of quantisation errors on DPCM image convolution is also presented.

Inspec keywords: cellular arrays; pulse-code modulation; two-dimensional digital filters; computerised picture processing

Other keywords: DPCM video signal processing; hardware requirement reduction; 6 bit; quantisation errors; real-time processing; encoding; cost saving; six-bit 1-D DPCM coding; 2-D systolic convolvers; DPCM image convolution; improvement in speed; systolic arrays; six-bit differential pulse-code modulation processing; image processing

Subjects: Optical information, image and video signal processing; Digital filters; Digital filters; Modulation and coding methods; Computer vision and image processing techniques

References

    1. 1)
      • A.C.P. Loui , A.N. Venetsanopoulos , C.L. Nikias . Modular architectures for two-dimensional digital signal processing. IEEE Trans. , 1 , 43 - 55
    2. 2)
      • R.H. Stafford . (1980) , Digital television, Bandwidth reduction and communication aspects.
    3. 3)
      • W.K. Pratt . (1978) , Digital image processing.
    4. 4)
      • P.E. Danielsson . Serial/parallel convolvers. IEEE Trans. , 7 , 652 - 667
    5. 5)
      • J.S. Ward , P. Barton , J.B.G. Roberts , B.J. Stanier . Figures of merit for VLSI implementations of digital signal processing algorith. IEE Proc. F , 1 , 64 - 70
    6. 6)
      • C. Mead , L. Conway , C. Seitz . (1980) , Introduction to VLSI systems.
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