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SC and pass transistor combined circuits

SC and pass transistor combined circuits

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The pass-transistor structure provides a powerful tool for the implementation of binary and multiple-valued logic (MVL). Circuit realisation of any general MVL function using literals, MAX and MIN is easy. However, the resulting circuits have certain limitations. A combination of pass transistors (PT) with switched-capacitor (SC) circuits is shown to provide useful improvements.

References

    1. 1)
      • Ishizuka, O.: `Synthesis of a pass-transistor network applied to multivalued logic', IEEE, 16th Int. Symp. MVL, May 1968, Blacksburg, Virginia, USA, p. 51–57.
    2. 2)
      • Current, K.W., Mangin, J.L., Haley, S.B.: `Characteristics of integrated CMOS quaternary logic encoder-decoder interface circuits', IEEE, Symp. Circuits and Systems, May 1984, Montreal, Canada, 2, p. 911–914.
    3. 3)
      • Ho, H.L.: `Switched-capacitor circuits in the implementation of multiple-valued logic', October 1989, MASc Thesis, University of Toronto, Department of Electrical Engineering.
    4. 4)
      • Watanabe, T., Kumatsumoto, M., Nagara, S.: `Design of quaternary switching circuits using individual MOS pass-transistors and capacitor memory', IEEE, 16th Int. Symp. MVL, May 1986, Blacksburg, Virginia, USA, p. 26–32.
    5. 5)
      • Zukeran, C., Afuso, C., Kameyama, M., Higuchi, T.: `Design of new low-power quaternary CMOS circuits multiple ion implants', IEEE, 15th Int. Symp. MVL, May 1985, Kingston, Ont., Canada, p. 84–90.
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