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Intel 87C51 and 512 kB CMOS sequential RWM

Intel 87C51 and 512 kB CMOS sequential RWM

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Connecting a large block of data memory to a single-chip microcontroller is usually solved by implementing the paging technique: enabling memory pages by the proper number of port lines. The circuitry described in this letter uses a rather different method of addressing, provided the data are accessed mostly sequentially.

References

    1. 1)
      • Intel: Microcontroller Handbook, MCS51 Data Sheet Sheet.
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