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Array two's-complement multiplier and square function

Array two's-complement multiplier and square function

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© The Institution of Electrical Engineers
Published

A two's-complement array multiplier and an array for the square function are presented. The negative elements present in the partial product matrix due to the two's-complement representation have been eliminated by encoding. No additional rows have been added, and the regularity and repeatability of the matrices have been retained.

Inspec keywords: digital arithmetic; cellular arrays; multiplying circuits; parallel architectures; VLSI; integrated logic circuits

Other keywords: VLSI compatible; two's-complement array multiplier; partial product matrix; repeatability; negative elements elimination; regularity; encoding; square function

Subjects: Logic circuits; Digital arithmetic methods; Multiprocessing systems

References

    1. 1)
      • Schwarz, E.M., Vassiuadis, S., Putrino, M.: `Direct computation of the polynomial expression ', Proc. IEEE Southern Tier Technical Conf., 29 April 1987, Binghampton, NY, SUNY, p. 101–111.
    2. 2)
      • C.R. Baugh , B.A. Wooley . A two's complement parallel array multiplication algorithm. IEEE Trans. , 1045 - 1047
    3. 3)
      • S.D. Pesaris . A 40-ns 17-bit array multiplier. IEEE Trans. , 442 - 447
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