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Novel MOS memory for serial signal processing applications

Novel MOS memory for serial signal processing applications

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© The Institution of Electrical Engineers
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A novel serial memory is reported, based on an array of MOS three transistor cells, which does not require serial-parallel data format convertors on the input and output. It can be used to realise compact, low-power delay elements of programmable length and is suitable for application in serial digital signal processing integrated circuits.

Inspec keywords: integrated memory circuits; CMOS integrated circuits; delay circuits; computerised signal processing

Other keywords: MOS memory; low-power delay elements; CMOS IC; digital signal processing integrated circuits; serial signal processing

Subjects: CMOS integrated circuits; Memory circuits; Semiconductor storage; Digital signal processing

References

    1. 1)
      • L.A. Glasser , D. Dobberpuhl . (1985) , The design and analysis of VLSI circuits.
    2. 2)
      • Myers, D.J., Ivey, P.A.: `STAR—a VLSI architecture for signal processing', Proceedings of conference on advanced research in VLSI, 1984, p. 179–183.
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