A self-aligned GaAs JFET process, allowing threshold voltage adjustment after gate metallisation, has been developed. Zn-doped tungsten silicide was used as the gate metallisation, which also acts as the source of Zn diffusion for the p-junction gate. The threshold voltage was adjusted by repeated short thermal pulses in a lamp annealer at 550°C. The process has the potential to solve the most difficult task of threshold voltage control necessary for achieving high yield in LSI fabrication.