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Au/TiN/WSi-gate self-aligned GaAs MESFETs using rapid thermal annealing method

Au/TiN/WSi-gate self-aligned GaAs MESFETs using rapid thermal annealing method

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Au/TiN/WSi-gate self-aligned GaAs MESFETs were fabricated using the rapid thermal annealing method to reduce the gate resistance of the FETs. The gate resistance Rg was 4.2 Ω (Lg=1.5 μm, Wg=400 μm), just 1/20 of that of the WSi-gate FET. The maximum frequency of oscillation fmax of the Au/TiN/WSi-gate FETs was improved to be about twice that of WSi-gate FETs.

Inspec keywords: Schottky gate field effect transistors; gallium arsenide; III-V semiconductors; annealing; semiconductor technology

Other keywords: Au/TiN/WSi-gate; self-aligned GaAs MESFETs; gate resistance; maximum oscillation frequency; rapid thermal annealing

Subjects: Other field effect devices; Semiconductor technology

References

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      • Nakayama, Y., Suyama, K., Shimizu, H., Yokoyama, N., Shibatomi, A., Ishikawa, H.: `A GaAs 16 × 16 bit parallel multiplier', ISSCC digest of technical papers, 1983, p. 48.
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      • T. Ohnishi , Y. Yamaguchi , T. Inada , H. Nishi . Application of the lamp-annealing method to the n+-layer of WSi-gate self-aligned GaAs MESFETs. IEEE Electron Device Lett. , 403 - 405
    3. 3)
      • Yokoyama, N., Onodera, H., Shinoki, T., Ohnishi, H., Nishi, H., Shibatomi, A.: `A 4K × 1 b static RAM', ISSCC digest of technical papers, February 1984, p. 44–45.
    4. 4)
      • T. Ohnishi , N. Yokoyama , H. Onodera , S. Suzuki , A. Shibatomi . Characterization of WSi/GaAs Schottky contacts. Appl. Phys. Lett.
    5. 5)
      • K. Imamura , T. Ohnishi , S. Suzuki , K. Nakai , H. Nishi . A WSi/TiN/Au gate self-aligned GaAs MESFET with Selectively grown n+-layer using MO-CVD. Jpn. J. Appl. Phys. Lett. , L342 - L345
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