Optically induced latch-up and other effects in CMOS UVEPROMs

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Optically induced latch-up and other effects in CMOS UVEPROMs

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© The Institution of Electrical Engineers
Published

Photographic flash-gun equipment used close to uncovered CMOS UVEPROMs can induce a variety of different failure modes including: (a) destructive latch-up, (b) transients in the output logic levels and in the supply current and (c) a nonde structive ‘output latching’ effect. The mode of failure observed depends on the level of illumination used and on the logic state of the output pins.

Inspec keywords: PROM; CMOS integrated circuits; circuit reliability; integrated memory circuits; transients; failure analysis

Other keywords: UV erasable PROM; output logic levels; CMOS UVEPROMs; failure modes; supply current; destructive latch-up; EPROM; transients; optically-induced latch-up

Subjects: Semiconductor storage; Memory circuits; CMOS integrated circuits

References

    1. 1)
      • C.J. Scott , D.J. Kuhn . Erasable memory device behaviour. Aust. Telecommun. Res. , 9 - 13
    2. 2)
      • Shiragasawa, T.: `Latch-up analysis on a 64 Kbit full CMOS static RAM using a laser scanner', Proceedings of 22nd IEEE international reliability physics symposium, 1984, p. 63–68.
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