Four quadrant multiplier core with lateral bipolar transistor in CMOS technology

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Four quadrant multiplier core with lateral bipolar transistor in CMOS technology

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© The Institution of Electrical Engineers
Published

A four quadrant multiplier core using lateral bipolar transistor in CMOS technology has been fabricated, tested and analysed. It has a high precision of linearity (with an error smaller than 2% for inputs over half of the power supply voltages), small offset of a few millivolts at the inputs, a small output offset of about 1.5 mV and a small dissipation.

Inspec keywords: VLSI; CMOS integrated circuits; multiplying circuits; bipolar transistors

Other keywords: four quadrant multiplier core; VLSI; high linearity precision; output offset; small offset; lateral bipolar transistor; CMOS technology; dissipation

Subjects: CMOS integrated circuits; Other analogue circuits

References

    1. 1)
      • B. Gilbert . IEEE J. Solid-State Circuits. IEEE J. Solid-State Circuits , 365 - 373
    2. 2)
      • E.A. Vittoz . IEEE J. Solid-State Circuits. IEEE J. Solid-State Circuits , 273 - 277
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