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Fault coverage of pattern-sensitive fault-detection algorithms for semiconductor memories

Fault coverage of pattern-sensitive fault-detection algorithms for semiconductor memories

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Experimental studies have been made on the fault coverage of pattern-sensitive fault-detection algorithms proposed for semiconductor memories. The experiment is carried out on a microprocessor-based system. A comparative study has been made based on the experimental results.

References

    1. 1)
      • J.P. Hayes . Testing memories for single-cell pattern-sensitive faults. IEEE Trans. , 249 - 254
    2. 2)
      • D.S. Suk , S.M. Reddy . A march test for functional faults in semiconductor random access memories. IEEE Trans. , 982 - 985
    3. 3)
      • S.C. Seth , K. Narayanaswamy . A graph model for pattern-sensitive faults in random access memories. IEEE Trans. , 973 - 977
    4. 4)
      • D.S. Suk , S.M. Reddy . Test procedure for a class of pattern sensitive faults in semiconductor random access memories. IEEE Trans. , 419 - 429
    5. 5)
      • Saifuddin, F.T.: `Pattern sensitive fault testing of semiconductor random access memories', , M.S. thesis, University of Cincinnati.
    6. 6)
      • J.P. Hayes . Detection of pattern sensitive faults in random access memories. IEEE Trans. , 150 - 157
    7. 7)
      • V.P. Srin . API tests for RAM chips. Computer , 32 - 35
    8. 8)
      • Thatte, S.M., Abraham, J.A.: `Testing of semiconductor random access memories', Proc. 7th Annual International Conference on fault tolerant computing, June 1977, IEEE Computer Society, p. 81–87.
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