© The Institution of Electrical Engineers
A technique is described for implementing modulo-N counters with u.h.f. performance using commercially available e.c.l. components and a high-speed digital multiplexer. A modulo-5 counter is designed according to this technique and performance at 1.6 GHz is demonstrated.
References
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Hughes, J.B., Coughlin, J.B., Harbott, R.G., Van den Hurk, T.H.J., Van de Bergh, B.J.: `A 3 Gbit/s ECL multiplexer', International Solid State Circuits Conference, 1979, p. 40–41.
http://iet.metastore.ingenta.com/content/journals/10.1049/el_19790455
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