Charge-splitting c.c.d. tapped delay lines

Access Full Text

Charge-splitting c.c.d. tapped delay lines

For access to this article, please select a purchase option:

Buy article PDF
£12.50
(plus tax if applicable)
Add to cart
Buy Knowledge Pack
10 articles for £75.00
(plus taxes if applicable)
Add to cart

IET members benefit from discounts to all IET publications and free access to E&T Magazine. If you are an IET member, log in to your account and the discounts will automatically be applied.

Learn more about IET membership 

Recommend Title Publication to library

You must fill out fields marked with: *

Librarian details
Name:*
Email:*
Your details
Name:*
Email:*
Department:*
Why are you recommending this title?
Select reason:
 
 
 
 
 
Electronics Letters — Recommend this title to your library

Thank you

Your recommendation has been sent to your librarian.

© Controller, HMSO
Published

Two new types of c.c.d. tapped delay lines are described. One has parallel channels separated by channel stops from input to output. The other has channel stop wedges partitioning charge packets down the device. High performance is achieved.

Inspec keywords: delay lines; charge-coupled device circuits

Other keywords: charge splitting CCD device; floating gate reset; tapped delay lines

Subjects: Other field effect integrated circuits

References

    1. 1)
      • D.J. Maclennan , J. Mavor , G.F. Vanstone . Technique for realising transversal filters using charge-coupled devices. Proc. IEE. , 6 , 615 - 619
    2. 2)
      • Bosshart, P.: `An integrated analogue correlator using charge coupled devices', Proceedings of the international solid-state circuits conference, 1976, p. 198.
    3. 3)
      • McCaughan, D.V.: Paper presented at ESSDERC, 1977.
http://iet.metastore.ingenta.com/content/journals/10.1049/el_19790143
Loading

Related content

content/journals/10.1049/el_19790143
pub_keyword,iet_inspecKeyword,pub_concept
6
6
Loading