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Parallel controller utilising a programmable-logic-array structure

Parallel controller utilising a programmable-logic-array structure

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© The Institution of Electrical Engineers
Published

The principle behind a parallel system controller using the inherent parallelism in a programmable logic array is presented. A controller based on this method incorporates the speed of dedicated logic with the advantages of programmability.

Inspec keywords: parallel processing; logic circuits; cellular arrays

Other keywords: parallel processing; cellular arrays; logic circuits; parallel controller; programmable logic arrays

Subjects: Semiconductor storage; Logic and switching circuits; Mainframes and minicomputers

References

    1. 1)
      • Rose, C.W., Bradshaw, F.T.: `The LOGOS representation system', Case Western Reserve University Report, 1971.
    2. 2)
      • Riches, D.N.: `Digital system control in programmable structures', December 1976, Doctoral thesis, University college of Swansea.
    3. 3)
      • J.L. Peterson . Petri nets. Comput Surv (USA) , 223 - 252
    4. 4)
      • Dennis, J.B.: `Modular asynchronous control structures for a high performance processor', Record of project MAC conference on concurent systems and parallel computation, 1970, p. 55–80.
    5. 5)
      • D. Aspinall , E.L. Dagless , R.D. Dowsing . Design methods for digital systems including parallelism. IEE J. Electron. Circ & Syst , 49 - 56
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