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Utilisation of a single inductorless neuristor line section as a voltage-to-frequency convertor

Utilisation of a single inductorless neuristor line section as a voltage-to-frequency convertor

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The principle of operation of a neuristor line for input pulses having duration times longer than the refractory period of the line is presented. In this case, a series of neuristor pulses are generated and appear at the output of the line. The duration time of the generated pulse ‘package’ corresponds to the duration time of the input pulse, while the repetition frequency of pulses is proportional to the amplitude of the input pulse. Theoretical relations and practical verification of the circuit operation are described.

References

    1. 1)
      • H. Crane . Neuristor—a novel device and system concept. Proc. IRE , 2048 - 2060
    2. 2)
      • B.M. Wilamowski . A novel concept of neuristor logic. Int. J. Electron. , 659 - 663
    3. 3)
      • B.M. Wilamowski , Z. Czarnul , M. Bialko . Novel inductorless neuristor line. Electron. Lett. , 355 - 356
    4. 4)
      • Z. Czarnul , M. Bialko , R.W. Newcomb . A neuristor-line pulse-train selector. Electron. Lett. , 205 - 206
    5. 5)
      • Z. Czarnul , M. Bialko . Selected neuristor logic circuits using single neuristor line section. Bull. Pol. Acad. Sci
    6. 6)
      • C. Kulkarni-Kohli , R.W. Newcomb . An integrable MOS neuristor line. Proc. IEEE , 1630 - 1632
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