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Second breakdown in high-voltage switching transistors

Second breakdown in high-voltage switching transistors

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A 2-dimensional mathematical model which includes the avalanche multiplication and internal self-heating effects has been used to predict the internal behaviour of a typical high-voltage power-transistor design. Collector n-n+ interface is the region of high electrical and thermal stresses which cause second-breakdown failure at high-current and high-voltage operating conditions.

References

    1. 1)
      • H.A. Schafft . Second breakdown—a comprehensive review. Proc. IEEE , 1272 - 1288
    2. 2)
      • S.P. Gaur . Quasisaturation-region operation of n−p−n−−n power transistors. Electron. Lett. , 446 - 447
    3. 3)
      • S.P. Gaur . Avalanche-multiplication-region operation of n−p−n−−n+ power transistors. Electron. Lett. , 170 - 171
    4. 4)
      • H.C. Poon , H.K. Gummel , D.L. Scharfetter . High injection in epitaxial transistors. IEEE Trans. , 455 - 457
    5. 5)
      • S.P. Gaur , D.H. Navon . Two-dimensional carrier flow in a transistor structure under nonisothermal conditions. IEEE Trans. , 50 - 57
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