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Durch Schaltungsmaßnahmen erhöhte Speicherzeit beim Ein-Transistor-Speicherelement (Increased storage time of a single-transistor memory cell)

Durch Schaltungsmaßnahmen erhöhte Speicherzeit beim Ein-Transistor-Speicherelement (Increased storage time of a single-transistor memory cell)

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Es ist ein Ein-Transistor-Speicherelement mit einer neuartigen Verschaltung von Auswahltransistor and Speicherkondensator erläutert. Im Vergleich mit einem Speicherelement herkömmlicher Bauart benötigt der neuartige Entwurf ca. 20% mehr Fläche, die Speicherzeit ist aber, wie Messungen zeigen, um mehr als zwei Zehnerpotenzen günstiger.An improved single-transistor memory cell using a new connection of the selector transistor and the storage capacitor is presented. Compared with a conventional single-transistor memory cell, the area consumption is about 20% larger, but, in contrast, the storage time is increased by at least a factor of 150.

References

    1. 1)
      • K.U. Stein , H. Friedrich . , Ein-Transistor-Speicherelement für eine Dichte von 1600 bit/mm.
    2. 2)
      • Stein, K.U., Sihling, A.: `Semiconductor memory having single transistor storage elements and a flip-flop circuit for the evaluation and regeneration of information', 3 774 137, 1973, US Patent.
    3. 3)
      • DENNARD, R.H.: ‘Kapazitiver wortorientierter Speicher unter Verwendung von Feldeffekt-Transistoren’. Auslegeschrift 1 774 482, IBM, Fig. 3.
    4. 4)
      • R. Joynson , J. Mundy , J. Burgess , C. Neugebauer . Elimination threshold losses in MOS circuits by bootstrapping using varactor coupling. IEEE J. Solid-State Circuits
    5. 5)
      • A.S. Grove . (1967) , Physics and technology of semiconductor devices.
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