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Field-effect-transistor-bridge multiplier-divider

Field-effect-transistor-bridge multiplier-divider

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A description is given of a 4-quadrant temperature-compensated multiplier-divider circuit in the form of a self-balancing f.e.t. bridge consisting of two matched f.e.t. pairs.

References

    1. 1)
      • W.H. Highleyman . An analog multiplier using two field-effect transistors. IRE Trans. , 311 - 317
    2. 2)
      • S. Osterfjells . Analog multiplier with field-effect transistors. Proc. Inst. Elec. Electron. Eng.
    3. 3)
      • M.M. Abu-Zeid , H. Groendijk , A. Willemse . Temperature compensated f.e.t. multiplier. Electron. Lett. , 324 - 325
    4. 4)
      • G. Dieterich , K. Hanauer . Preiswerter und genauer Analog-multiplizierer. Elektronik , 265 - 268
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