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Testing switching networks for short-circuit faults

Testing switching networks for short-circuit faults

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A significant class of faults in switching networks is due to short circuits between signal terminals. A method is proposed which tests networks for such faults, making use of algorithms developed for detecting or diagnosing stuck-at-level faults.

References

    1. 1)
      • C.V. Ramamoorthy . Fault tolerant computing: an introduction and overview. IEEE Trans. , 1241 - 1244
    2. 2)
      • J.P. Hayes . A NAND model for fault diagnosis in combinational logic networks. IEEE Trans. , 1496 - 1506
    3. 3)
      • G.R. Patzolu , J.P. Roth . A heuristic algorithm for the testing of asynchronous circuits. IEEE Trans. , 639 - 647
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