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An experimental 64-bit m.o.s. associative memory has been developed from a limit-case design study. Speeds in excess of 50 MHz are reported at a cost per bit that could approach eight times that for a conventional m.o.s. dynamic r.a.m. The design of the basic associative memory cell is described.
Inspec keywords: semiconductor storage devices; semiconductor storage systems; random-access storage; associative storage; metal-insulator-semiconductor devices; cellular arrays
Other keywords:
Subjects: Other semiconductor devices; Other field effect devices; Semiconductor storage