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Two-dimensional analysis of j.f.e.t. structures containing a low-conductivity substrate

Two-dimensional analysis of j.f.e.t. structures containing a low-conductivity substrate

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It is shown that j.f.e.t. structures containing a semiconductor substrate can sometimes exhibit a substantially lower saturation resistance than structures containing an ideally insulating substrate. This characteristic is attributed to velocity-limited carrier transport, in conjunction with the spreading of majority carriers into the semiconductor-substrate material.

References

    1. 1)
      • M. Reiser . Two-dimensional analysis of substrate effects in junction f.e.t.s. Electron. Lett. , 493 - 494
    2. 2)
      • Drangeid, K.E.: Proceedings of the international conference on electron devices, 23rd–25th October 1968, .
    3. 3)
      • D.P. Kennedy , R.R. O'Brien . Computer aided two dimensional analysis of the junction field-effect transistor. IBM J. Res. & Develop. , 95 - 116
    4. 4)
      • Kennedy, D.P.: `Mathematical simulation of the effects of ionizing radiation on semiconductors', AFCRL contract F 19628–67–C0116, Final report, February 1970.
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