The characteristics of current gain and transconductance are discussed for silicon planar transistors for collector currents ranging from 10⁻¹¹ to 10⁻³A, and it is shown that useful gain may be obtained at collector currents of 10⁻⁷A or lower. This information can be used to design d.c. amplifiers with very low standing input currents, or alternatively to design complex multitransistor equipments with very low (< 1mA) battery drain, permitting extended operation in unattended or remote situations.