AsTeGeSiN threshold switching devices, which have recently gained attention for their reliable operation, are investigated for the degradation mechanism under constant voltage stress (CVS). Threshold switching devices are essential for 3D stacking of high-density memories. The degradation mechanism can be divided into two conduction regions, i.e. before and after the threshold voltage (V _th) by applying CVS. It is found that charge trapping, which can easily be recovered, is the main degradation mechanism in the low-conduction region. This is because Poole–Frankel conduction by deep traps occurred in the low-conduction region. However, trap generation may occur when going from deep traps to shallow traps, which is an important factor in the high-conduction region stress voltage. Switching stress for different duty cycles in two conduction regions is also performed. Therefore, when operating an AsTeGeSiN threshold-switching device as a selector, the read sequence is not a problem despite frequent usage. However, for the write sequence, reducing the number and duration of pulses helps extend the device's lifetime.