access icon free Stretched tunnelling body contact structure for suppressing the FBE in a vertical cell DRAM

Vertical cell transistor is necessary to drastically reduce the chip size of the dynamic random access memory. This structure has a great advantage in terms of shrinkage, but it also has the disadvantage of increasing the OFF-state current by causing floating body effect (FBE). For the first time, it is demonstrated that a stretched tunnelling diode, which consists of a p+ layer next to the n+ active layer in the buried body, leads to a drastically suppressed FBE. The OFF-state current is sharply reduced by about seven orders compared with a conventional structure. Furthermore, the decrease in the OFF-state current is at minimum when the length of the stretched p + region is approximately half the channel length (L p/L=1/2).

Inspec keywords: DRAM chips; transistor circuits; flexible electronics; tunnel diodes

Other keywords: OFF-state current; n+ active layer; stretched tunnelling body contact structure; vertical cell DRAM; stretched tunnelling diode; vertical cell transistor; buried body; dynamic random access memory; floating body effect; p+ layer; FBE

Subjects: Semiconductor storage; Memory circuits

References

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      • 3. Schloesser, T., Jakubowski, F., Kluge, J.V., et al: ‘6F2 buried wordline DRAM cell for 40 nm and beyond’. IEDM Technical Digest, San Francisco, CA, USA, December 2008, pp. 14, doi: 10.1109/IEDM.2008.4796820.
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http://iet.metastore.ingenta.com/content/journals/10.1049/el.2019.2541
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