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Current mirror-based compensation circuit for multi-row read in-memory computing

Current mirror-based compensation circuit for multi-row read in-memory computing

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Multi-row read plays an important role in in-memory computing and its precision affects the accuracy of the calculation. In this brief Letter, a discharge compensation method is proposed for the linearisation of multi-row read operations in static RAM. Current mirrors are added to bitlines to compensate for the discharge voltage. With compensation, the integral non-linearity decreases by 72% compared with the situation without compensation. In addition, a wordline signal generation circuit based on replica bitline is proposed to reduce area cost.

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