© The Institution of Engineering and Technology
This Letter proposes a read-decoupled (RD) and average 8T1R non-volatile static RAM (SRAM), RD-8T1R. It uses only one memristor to achieve store energy reduction and higher restore yield compared with other two memristors based non-volatile SRAMs. In addition, this structure can offer two alternative SRAM modes unlike previously known non-volatile SRAMs, i.e. a high speed and a stable mode. Compared with existing technologies, the simulation results in TSMC-65 nm show that the proposed scheme provides a remarkable restore yield. There are 154% improvement in the read static noise margin (@typical–typical (@TT) corner and stable mode) and 23% improvement in the read delay (@TT corner and high speed mode) compared with the previous 6T/7T/8 T non-volatile SRAMs.
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