Read-decoupled 8T1R non-volatile SRAM with dual-mode option and high restore yield

Read-decoupled 8T1R non-volatile SRAM with dual-mode option and high restore yield

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This Letter proposes a read-decoupled (RD) and average 8T1R non-volatile static RAM (SRAM), RD-8T1R. It uses only one memristor to achieve store energy reduction and higher restore yield compared with other two memristors based non-volatile SRAMs. In addition, this structure can offer two alternative SRAM modes unlike previously known non-volatile SRAMs, i.e. a high speed and a stable mode. Compared with existing technologies, the simulation results in TSMC-65 nm show that the proposed scheme provides a remarkable restore yield. There are 154% improvement in the read static noise margin (@typical–typical (@TT) corner and stable mode) and 23% improvement in the read delay (@TT corner and high speed mode) compared with the previous 6T/7T/8 T non-volatile SRAMs.


    1. 1)
      • 1. Yamamoto, S., Shuto, Y., Sugahara, S., et al: ‘Nonvolatile SRAM (NV-SRAM) using functional MOSFET merged with resistive switching devices’. IEEE Custom Integrated Circuits Conf., Rome, Italy, September 2009, pp. 531534.
    2. 2)
    3. 3)
      • 3. Wei, W., Gibby, A., Wang, Z., et al: ‘Nonvolatile SRAM cell’. Proc. Int. Electron Devices Meeting, San Francisco, CA, USA, December 2006, pp. 14.
    4. 4)
      • 4. Shyh-Shyuan, S., Chia-Chen, K., Meng-Fan, C., et al: ‘A ReRAM integrated 7T2R non-volatile SRAM for normally-off computing application’. Proc. IEEE Solid-State Circuits Conf., Sentosa Island, Singapore, 2013, pp. 245248.
    5. 5)
    6. 6)
      • 6. Tosson, A.M.S., Abdelwahed, T., Neale, A., et al: ‘8T1R: a novel low-power high-speed RRAM-based non-volatile SRAM design’. 2016 International Great Lakes Symposium on VLSI (GLSVLSI), Boston, MA, USA, May 2016, pp. 239244.
    7. 7)
      • 7. Albert, L., Meng-Fan, C., Chien-Chen, L., et al: ‘RRAM-based 7T1R nonvolatile SRAM with 2x reductionin store energy and 94x reduction in restore energy for frequent-off instant-on applications’. Proc. IEEE Symp. on VLSI Circuits, Kyoto, Japan, 2015, pp. C76C77.
    8. 8)

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