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Low-power, high-speed output buffer with shared-TIA for ultra-large IRFPAs

Low-power, high-speed output buffer with shared-TIA for ultra-large IRFPAs

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In this Letter, a low-power, high-speed output buffer for ultra-large infrared focal plane arrays (IRFPAs) is proposed. This buffer adopts a shared trans-impedance amplifier structure, which reduces parasitic resistance and capacitance of column-level bus. A 1280 × 1024 array readout integrated circuit with 20 MHz output frequency is designed for cooled infrared detector using this novel structure. The chip has been realised with 0.35 μm 1P4M CMOS process and power consumption of the proposed single output buffer is 3.83 mW. Though the presented circuit has been designed for this design, it shows great potential to be employed in most ultra-large readout integrated circuits.

http://iet.metastore.ingenta.com/content/journals/10.1049/el.2018.7250
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