access icon free High-precision differential time integrator based on time adder

A high-precision time integrator is presented whose output is the accumulation of sequence of time inputs. A novel time adder with time-domain differential structure is proposed to avoid common-mode errors such as supply noise and leakage current. The performance under various process, voltage and temperature conditions is examined in detail. By using two time adders in parallel, a differential synchronous time integrator is proposed, which is easier to cascade with other time-mode arithmetic circuit. Implemented in 65 nm 1.2 V CMOS technology, the proposed time integrator achieves a gain of 27.97 dB with a 317 kHz 30 ps peak-to-peak sinusoidal input, and consumes with 50 MHz sampling rate. The experimental results confirm the integration operation is realised properly and accurately.

Inspec keywords: adders; leakage currents; CMOS integrated circuits; digital arithmetic; integrated circuit design; differential equations

Other keywords: size 65.0 nm; gain 27.97 dB; voltage 1.2 V; time-domain differential structure; voltage conditions; frequency 50.0 MHz; time 30.0 ps; temperature conditions; high-precision differential time integrator; differential synchronous time integrator; peak-to-peak sinusoidal input; time adder; CMOS technology; time-mode arithmetic circuit; frequency 317.0 kHz

Subjects: Differential equations (numerical analysis); CMOS integrated circuits; Differential equations (numerical analysis); Logic and switching circuits; Logic circuits

http://iet.metastore.ingenta.com/content/journals/10.1049/el.2018.6288
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content/journals/10.1049/el.2018.6288
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