access icon free Automated verification of input completeness for NCL circuits

An automated formal verification approach for ensuring input completeness of NULL Convention Logic (NCL) circuits is proposed. NCL circuits have the benefit that they can operate in extreme environments where traditional synchronous circuits fail due to significant fluctuations in circuit timing. Input completeness is a critical property to ensure correct functioning of NCL circuits in extreme environments and therefore is required to be verified. Note that an NCL circuit can be functionally correct and still not be input complete, which could cause the circuit to operate correctly under normal conditions, but malfunction only when the circuit timing is substantially changed (e.g. operating in a very hot or cold environment such as outer space).

Inspec keywords: asynchronous circuits; logic design; formal verification

Other keywords: NULL Convention Logic circuits; input completeness; circuit timing; extreme environments; automated formal verification approach; NCL circuit

Subjects: Formal methods; Logic and switching circuits; Digital circuit design, modelling and testing; Logic design methods; Logic circuits

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http://iet.metastore.ingenta.com/content/journals/10.1049/el.2018.6068
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