Phase noise mitigation architecture for wireless full-duplex transceivers

Phase noise mitigation architecture for wireless full-duplex transceivers

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A novel transceiver architecture is proposed to mitigate the phase noise in the prevailing wireless full-duplex transceivers. In this architecture, an oscillator module is designed to generate both the transmitter and the receiver oscillator signals from one single oscillator. Particularly, a digitally-controlled delay module is used to control the delay of the receiver oscillator signal before mixing with the received signal at the down converter. By adjusting the delay value of the receiver oscillator signal, the power of residual self-interference (SI) after digital SI cancellation can be minimised. Analytical and simulation results show that the digital SI cancellation capability of the proposed architecture can be 18 dB better than that of the conventional architecture of sharing one oscillator for transmitter and receiver.


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