%0 Electronic Article
%A S.-J. Kim
%A D.-I. Seo
%A J.-S. Kim
%A R. Song
%A B.-S. Kim
%K DC power consumption
%K choke inductor
%K NP core
%K dual resonance problem
%K compact CMOS LiT VCO
%K size 65 nm
%K power 6 mW
%K phase noise
%K compact CMOS linear transconductance voltage-controlled oscillator
%K frequency 11.18 GHz to 11.98 GHz
%K FoMA
%X A compact CMOS linear transconductance (LiT) voltage-controlled oscillator (VCO) in 65 nm CMOS process is presented. The proposed LiT technique is realised using NP core without a choke inductor to reduce die area and avoid dual resonance problem. The measured output frequency of the proposed VCO shows 11.18–11.98 GHz and phase noise is −112.62 dBc/Hz at 1 MHz offset frequency. DC power consumption of the VCO core and the buffer is 5.86 and 6 mW, respectively. It achieves a high figure of merit normalised to the area of 198.6 dBc/Hz.
%@ 0013-5194
%T Compact CMOS LiT VCO achieving 198.6 dBc/Hz FoM_{A}
%B Electronics Letters
%D February 2018
%V 54
%N 3
%P 175-177
%I Institution of Engineering and Technology
%U https://digital-library.theiet.org/;jsessionid=43biu8na9c3vc.x-iet-live-01content/journals/10.1049/el.2017.4047
%G EN