access icon free QD floating gate NVRAM using QD channel for faster erasing

A new pathway to design floating gate quantum dot (QD) non-volatile RAM (QDNVRAM) cells that possess high-speed low-voltage Erase capabilities not possible with conventional floating gate NV memories is presented. This is achieved by directly accessing the QD floating gate layer with an additional drain (D2) during the Erase operation. Experimental data on fabricated long-channel (10 μm/14 μm) QDNVRAM cell shows ‘Erase’ pulse duration of ∼4 μs at voltage of about 10 V using drain D2 which is over two-order smaller than the ‘Write’ pulse value. Quantum mechanical simulations are also presented. QDNVRAM fabrication process is compatible with CMOS processing.

Inspec keywords: semiconductor quantum dots; random-access storage; CMOS memory circuits

Other keywords: CMOS processing; QD channel; QD floating gate NVRAM; quantum dot; size 14 mum; nonvolatile RAM; floating gate NV memory; high-speed low-voltage erase capability; size 10 mum; QDNVRAM cell; quantum mechanical simulation

Subjects: Memory circuits; Semiconductor storage; CMOS integrated circuits

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http://iet.metastore.ingenta.com/content/journals/10.1049/el.2017.2931
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